Lock Box Implementation for Fine Grained Hardware Synchronization
نویسنده
چکیده
This goal of this project is to implement finegrained synchronization on a Chip Multiprocessor. Synchronization of multiple threads is an important aspect of parallel programs. Over the years researchers have proposed several algorithms and hardware implementations that attempt to understand the trade-offs in terms of latency, bandwidth, implementation complexity etc, nonetheless synchronization remains a significant concern for parallel applications. This study shows that with simple hardware implementation the cost of synchronizing multiple threads can be significantly reduced.
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